Then , a linear - time partitioning algorithm based on a linear ordering of nodes in a circuit for parallel logic simulation is presented 然后,提出一種在對(duì)電路中節(jié)點(diǎn)進(jìn)行線性排序的基礎(chǔ)上的線性時(shí)間劃分算法。
Simulation examples to demonstrate the performance of the partitioned algorithms show that the algorithm possesses robustness and high adaptability 仿真實(shí)例表明,分部算法的魯棒性更強(qiáng),對(duì)系統(tǒng)初值的改變具有更強(qiáng)的適應(yīng)能力。
Unlike most other partitioning algorithms , the proposed algorithm preserves circuit concurrency by balancing the workload on processors at real time 本文提出的算法很好的解決了這個(gè)問(wèn)題,保證了模擬過(guò)程中各個(gè)處理器上的實(shí)時(shí)負(fù)載平衡,實(shí)現(xiàn)了高度的并行性。
Experiments show that the new optimized partition algorithm can improve the parallel simulation performance compared with the ones partitioned by traditional graph partition algorithms 實(shí)驗(yàn)表明,該優(yōu)化劃分方法相對(duì)于傳統(tǒng)的圖劃分算法能夠有效地提高模擬性能。
To solve the problem of rule learning time cost for traditional transformation based part of speech tagging method of latin mongolian , a dynamic partition algorithm was presented 針對(duì)傳統(tǒng)基于轉(zhuǎn)換的詞性標(biāo)注方法中規(guī)則學(xué)習(xí)速度過(guò)慢的問(wèn)題提出了一種對(duì)訓(xùn)練語(yǔ)料庫(kù)進(jìn)行動(dòng)態(tài)劃分的算法。