programmable gate array造句
例句與造句
- Field programmable gate arrays ( fpga ) can be programmed in the field to implement any logic circuits of requirement from user . because of their reprogrammability , they are good candidates for rapid system prototyping
現(xiàn)場可編程門陣列( fpga )器件能通過對其進行編程實現(xiàn)具有用戶規(guī)定功能的電路，因而特別適合集成電路的新晶開發(fā)和小批量asic電路的生產(chǎn)。 - It could not get better result if only use field programmable gate array ( fpga ) or digital signal processing chip ( dsp ) . nowadays , it is common practice to use fpga + dsp scheme for real - time infrared image processing
而如果將fpga和dsp相結(jié)合，則既可發(fā)揮fpga的高速優(yōu)勢，又可發(fā)揮dsp的靈活特點，這樣就實現(xiàn)了一種功能強大的能對不同紅外圖像進行處理的系統(tǒng)。 - As a kind of high - density special digital integrated chip configured by user , field programmable gate array ( fpga ) has many advantages , such as miniaturization , low power dissipation , programmable logic , digitalization and velocity
現(xiàn)場可編程門陣列( fpga )是一種由用戶自行配置的高密度專用數(shù)字集成芯片,具有小型化、低功耗、可編程、數(shù)字化和快速方便實用的特點。 - 2 . by analyzing the partial discharge signals and the interferences and using high - speed filed programmable gate array ( fpga ) and digital signal processor ( dsp ) , a hardware and print circuit board have been designed 3
2 )通過對局部放電和干擾的分析，針對局部放電信號實時處理的要求，利用高速的現(xiàn)場可編程邏輯器件和數(shù)字信號處理器完成了信號處理的硬件電路板的設(shè)計與制作。 - This thesis consists of designing and implementing a jpeg encoder system that is compatiable with jpeg baseline mode using fpga ( field programmable gates array ) in standard hardware description language verilog
本文探討了以fpga （ fieldprogrammablegatesarray ）為平臺，使用hdl （ hardwaredescriptionlanguage ）語言設(shè)計并實現(xiàn)符合jpeg靜態(tài)圖象壓縮算法基本模式標(biāo)準(zhǔn)的圖象壓縮芯片。 - It's difficult to find programmable gate array in a sentence. 用programmable gate array造句挺難的
- 2 . the micro - computer and the field programmable gate array ( fpga ) realize the control part of this t / r signal processor appealing the high speed transfer request , and the transform of communication protocol between mcu and this signal processor . 3
系統(tǒng)控制部分用單片機和現(xiàn)場可編程邏輯器件( fpga )來實現(xiàn)，完成了數(shù)據(jù)的高速傳輸要求，以及單片機和收發(fā)信機部分的通信協(xié)議轉(zhuǎn)換。 - The system discussed in the dissertation has the compact architecture built with dsp ( digital signal processor ) , fpga ( field programmable gate array ) , and ram . by using lcd ( liquid crystal display ) it provides the friendly menu interface for user ' s convenient operation
本文中設(shè)計的數(shù)字示波表系統(tǒng)采用非常簡潔的設(shè)計結(jié)構(gòu)dsp + fpga + ram ，使用lcd顯示器，并為用戶提供友好的菜單界面。 - At last , the tracking algorithm runs in a hardware system of automatic target tracking . this system uses tms320c6711 dsp ( digital signal processor ) as cpu , and uses fpga ( field programmable gate array ) to control the system
本文在研究自動目標(biāo)跟蹤算法的基礎(chǔ)上,進一步將算法在基于數(shù)字信號處理機dsp ( digitalsignalprocessor )和現(xiàn)場可編程門陣列fpga ( fieldprogrammablegatearray )的硬件系統(tǒng)上實現(xiàn)。 - The system used hight - performance dsp ( tms320c6202 ) to realize the real - time image object tracking algorithm , used large - scaled programmable logical array cpld to control logic and field programmable gate array fpga to preprocessing the image
其中運用了高性能dsp ( tms320c6202 )完成實時圖像目標(biāo)處理算法，并結(jié)合大規(guī)?？删幊踢壿嬯嚵衏pld進行邏輯控制和現(xiàn)場可編程門陣列fpga對采集的視頻圖像做預(yù)處理，滿足了系統(tǒng)的實時性。 - With recent advance in micro - electronics technologies , fpga ( field programmable gate array ) has become more and more important in digital system design , because of its high performance in terms of scalability , functionality and so on
近幾年來,由于微電子技術(shù)的迅猛發(fā)展,使得fpga (現(xiàn)場可編程門陣列, fieldprogrammablegatearray )的性能指標(biāo),比如規(guī)模、功能等越來越好。因此, fpga在數(shù)字系統(tǒng)設(shè)計中占據(jù)了越來越重要的位置。 - Fpga ( field programmable gate arrays ) is a new type of ic ( integrated circuit ) in recent years . it has advantages of compactness 、 economy 、 high speed 、 low consumption 、 full integration and good applicability . it is easy to be developed and be maintained
現(xiàn)場可編程門陣列器件( fieldprogrammablegatearrays )是近年來嶄露頭角的一類新型集成電路,它具有簡潔、經(jīng)濟、高速度、低功耗等優(yōu)勢,又具有全集成化、適用性強,便于開發(fā)和維護(升級)等顯著優(yōu)點。 - In view of numerous digital and analog signals need to be processed , and the difficulty of real - time processing of multi channel 400 hz ac signal , vhdl ( vhsic hardware description language ) is applied to design the digital circuit , which is successfully realized in field programmable gates array ic - xc2s100
針對i o模塊中需要處理的數(shù)字量和模擬量較多的事實，以及多路400hz信號的實時處理較為繁重的現(xiàn)狀，作者采用了現(xiàn)場可編程門陣列( fpga )加以解決。 - After the investigation of the general technology of hardware implementation , how to implement the kasumi algorithm using field programmable gate array ( fpga ) device is discussed in detail , and the author develops the cipher chip of kasumi algorithm , the kasumi cipher card based on 32 - bits pci bus , the wdm device driver that used in windows2000 / xp , and the software to demostrate encrypting data link . finally , an application demostration is constructed with all the above implementation
在此硬件實現(xiàn)的結(jié)果芯片基礎(chǔ)上，設(shè)計了32位的基于pci總線的kasumi加密卡，編寫了windows2000 xp下的windows驅(qū)動程序模型( wdm )驅(qū)動程序和鏈路加密應(yīng)用程序，由此構(gòu)成一個應(yīng)用演示系統(tǒng)，作為研制結(jié)果的應(yīng)用評估，為進一步進行第三代移動通信系統(tǒng)相關(guān)安全技術(shù)研究和開發(fā)提供了基礎(chǔ)條件。 - Because period narrow band signals are the main part of background noises , this thesis uses hardware description language to design a multi - band finite impulse response filter ( fir ) and downloads the program into filed programmable gate array to eliminate the period narrow - band interferences in the background noises
3 )在現(xiàn)場環(huán)境中，背景干擾主要是周期性的窄帶，本文利用硬件描述語言( vhdl )設(shè)計了一個多帶fir有限沖擊響應(yīng)濾波器。應(yīng)用到可編程邏輯器件中，消除了背景噪聲中的周期性干擾，為信號的進一步處理提供盡可能干凈的信號。 - Finally , on the basis of the mpeg - 1 layer hencoding hardware structure , the block of logic communicates with the pc over the parallel port and the interface for flash memory are design . then a mpeg audio coding system , which applies to store audio signal , is presented through the field programmable gate array device technology
最后，在mpeg - 1層編碼的硬件結(jié)構(gòu)的基礎(chǔ)上，結(jié)合計算機并口通信和flash存儲器的接口模塊，采用現(xiàn)場可編程邏輯器件fpga技術(shù)，最終設(shè)計了一種應(yīng)用于音頻信號存儲的mpeg音頻編碼系統(tǒng)。