例句與用法

1. For vlsi, a plane surface may be approximated by depositing the interlevel dielectric by bias-sputter deposition (see section 9. 2. 4) or by using planarization .
   對(duì)于超大規(guī)模集成電路的平面狀表面，可以用偏置濺射淀積法的層間介質(zhì)淀積（見924節(jié)）或用平面化工藝來近似獲得。
2. Chemical mechanical polishing planarization , cmp
   化學(xué)機(jī)械拋光
3. For vlsi , a plane surface may be approximated by depositing the interlevel dielectric by bias - sputter deposition ( see section 9 . 2 . 4 ) or by using planarization
   對(duì)于超大規(guī)模集成電路的平面狀表面，可以用偏置濺射淀積法的層間介質(zhì)淀積（見9 2 4節(jié)）或用平面化工藝來近似獲得。