Design the data path of the risc 51 ip core . emphasis on the arithmetic logical unit ; 3 . design the control path of the risc 51 ip core to make the risc 51 ip core ' s instruction set compatible with mcs51 microcontroller ; 4 ( 3 )設(shè)計(jì)risc51ipcore控制通路,實(shí)現(xiàn)risc51ipcore內(nèi)部指令與原mcs51指令系統(tǒng)的完全兼容,具體設(shè)計(jì)原mcs51指令與risc結(jié)構(gòu)51核指令的轉(zhuǎn)換過程,及正確的指令時序。
This paper analyze the architecture of amex86 microprocessor , including the analyzer of instruction system , addressing mode , scheduling and clock of instruction , the integration and validation of amex86 architecture . this paper mainly discusses the design and realization of data path and instruction decoder in detail 本論文將對amex86體系結(jié)構(gòu)的微處理器進(jìn)行體系結(jié)構(gòu)分析,包括指令系統(tǒng)的分析、尋址方式的分析,指令時序以及指令時鐘拍數(shù)的分析和amex86系統(tǒng)的集成及驗(yàn)證等。