In addition , an experimental system using c language is established , including modules such as representation of waveform polynomial , decision of path senstization , delay computing , clocking based on single - period sensitization , clocking based on multi - period sensitization , test generation considering noise and transformation from bit - level waveform polynomial to word - level polynomial model . they respectively used to test models and techniques proposed in this paper 另外, :基于c語言本人設(shè)計(jì)開發(fā)了一個(gè)實(shí)驗(yàn)軟件系統(tǒng),該系統(tǒng)包括波形多j一貞式表示模塊、敏化通路判定模塊、延時(shí)計(jì)算模塊、單周期敏化的最小時(shí)鐘周期精確確定模塊、多周期敏化的最小時(shí)鐘周期確定方法模塊、考慮噪聲的測(cè)試生成模塊和位級(jí)波形多項(xiàng)式描述轉(zhuǎn)化成字級(jí)多項(xiàng)式描述模塊,分別用于對(duì)本文各章中提出的自動(dòng)化設(shè)計(jì)的模型和方法進(jìn)行實(shí)驗(yàn)驗(yàn)證。
Conditional sensitization of paths is presented from the sensitization theorem of sequential circuits and a novel exact clocking method based on single - period sensitization is proposed . compared with tranditional methods , it is not too optimistic or pessimistic , fit for the exact timing of high - speed circuit design 在時(shí)序邏輯電路精確定時(shí)方面,從時(shí)序電路的敏化定理出發(fā),使用本文給出的條件可敏化概念,通過對(duì)通路敏化性質(zhì)的判斷建立了一種新的單周期敏化的時(shí)序電路最小時(shí)鐘周期精確確定方法。
Then studis on new models and new approaches based on boolean process in delay automation are made . analytical delay model is improved with the new concept of sensitization , based on which delay matrix is proposed to describe the delay of circuit modules . then introducing hierarchical delay analysis methods into delay matrix analysis , a novel exact hierarchical delay ananlysis method is presented 在組合邏輯電路精確定時(shí)方面,本文用波形多項(xiàng)式偏導(dǎo)定義的敏化概念改進(jìn)了解析延時(shí)模型,在此基礎(chǔ)上建立了基于敏化的延時(shí)矩陣以描述電路模塊的延時(shí),隨后將層次化延時(shí)分析方法引入基于延時(shí)矩陣的延時(shí)分析中,形成一種新的精確的通用電路層次化延時(shí)分析方法。