Extension of dsp out - memorizer by cpld 片外存儲(chǔ)器擴(kuò)展
Through this system , the user can regard this multi - computer of network as a super computer which has many cpus and many memorizers 通過該系統(tǒng),用戶可以把通過網(wǎng)絡(luò)連接的多臺(tái)計(jì)算機(jī)看作一臺(tái)超級(jí)計(jì)算機(jī),它有多個(gè)cpu和多個(gè)存儲(chǔ)器。
In order to apply the system ' s real - time , this design uses a kind of fifo data memorizer , idt7204 which need not address and the data ' s input and output are independent 為實(shí)現(xiàn)系統(tǒng)的實(shí)時(shí)性,本系統(tǒng)采用一種先進(jìn)先出的數(shù)據(jù)存儲(chǔ)器id竹204 ,無須地址線,且數(shù)據(jù)的輸入和輸出是獨(dú)立分開的。
This text described to use an memorizer with some additional and necessary of controlling by the conversion electric circuit according to the dds principle in order to produce the principle of sine wave and carry out a method 摘要敘述了基于dds原理,用存儲(chǔ)器附加必要的控制和轉(zhuǎn)換電路可產(chǎn)生正弦波的原理和實(shí)現(xiàn)方法。
In the case of unexpected power - off incidents the main controlling chip can write ik byte words into a memorizer called at24c08 by i2c bus , thereforc the important parameters of the electric net period of time before the incident will be recorded 通過i ~ 2c總線主控芯片可將1k字節(jié)的數(shù)據(jù)寫入at24c08存儲(chǔ)器中,在掉電的情況下仍能保存一段時(shí)間內(nèi)電網(wǎng)的重要運(yùn)行參數(shù)。
This paper gives detailed discussion on the design and the implementation of the personal minitype electrocardiograph ' s main control board . it includes such a few circuit modules as mcu , memorizer , lcd control , touch panel control and so on 本論文對(duì)“個(gè)人微型心電圖儀”主控板上的主要電路模塊的設(shè)計(jì)思想及實(shí)現(xiàn)原理進(jìn)行了較詳細(xì)的敘述與討論,包括微控制器、存儲(chǔ)器、液晶顯示與控制、觸摸屏控制等電路模塊。
This hardware system has fully utilized interface hpi of host computer and memory resource that dsp offers , realizes parallel structure of share memorizer mode skillfully , the whole system structure is succinct , the programming is convenient and flexible , the expanding can be strong 該硬件系統(tǒng)充分利用了dsp所提供的主機(jī)接口hpi和內(nèi)存資源,巧妙地實(shí)現(xiàn)了共享存儲(chǔ)器方式的并行結(jié)構(gòu),整個(gè)系統(tǒng)結(jié)構(gòu)簡潔,編程方便、靈活,可擴(kuò)展性強(qiáng)。
In the paper , the system architecture of the edbms based on the ems memory is pinpointed . those pivotal techniques in the development of the system , including the physical memorizer management , query process , data synchronization and other technology are further discussed 在這個(gè)思想的指導(dǎo)下,本文重點(diǎn)考慮了基于內(nèi)存的嵌入式數(shù)據(jù)庫管理系統(tǒng)的體系結(jié)構(gòu),采用了有效的物理存儲(chǔ)管理機(jī)制、查詢處理和數(shù)據(jù)同步技術(shù),并對(duì)關(guān)鍵部分的實(shí)現(xiàn)方式進(jìn)行了詳細(xì)討論。
Power transformer test is simulanted in test - room , try to prove that online measure of transformer test is feasible . the test results are satisfaction . in the end , there is software design : the instrumented - test - interface is developed ; location computer entering to sample state is the same time , and after the same " log time " , it stops the data sample note . every test signal data keeping in the data note memorizer is at the same time , so it realizes data synchronization collection . some blocking design in the process of software design can apply to the other software 文章的最后,針對(duì)變壓器試驗(yàn)微機(jī)測(cè)試系統(tǒng)對(duì)電流、電壓、功率等變量數(shù)據(jù)采集的特殊要求,分析了同步誤差的產(chǎn)生原因,給出了同步軟件采樣的無差條件;建立了電壓電流有效值和平均功率測(cè)量誤差的數(shù)學(xué)模型,提供了減小測(cè)量誤差的措施;應(yīng)用“同步軟件采樣技術(shù)” ,不需要增加采樣周期數(shù),不需要硬件同步環(huán)節(jié),較好地解決了同步誤差對(duì)測(cè)量精度的影響。