例句與造句

1. In this paper , hardware / software codesign is used to solve die problems
   本文采用軟硬件協(xié)同設(shè)計(jì)的思想來進(jìn)行md32存儲系統(tǒng)的設(shè)計(jì)。
2. Research and implement in cluster data communication mechanism based on software hardware codesign
   基于軟硬件協(xié)同的機(jī)群數(shù)據(jù)通信機(jī)制的研究與實(shí)現(xiàn)
3. 5 li y , callahan t , darnell e et al . rm hardware - software codesign of embedded reconfigurable architectures
   使得人們能夠?yàn)檠芯扛咝У腸sp方法而開發(fā)良好的功能程序范例與變換技術(shù)。
4. By using hardware / software codesign , the design cycle can be shortened and design efficiency can be improved
   軟硬件協(xié)同設(shè)計(jì)協(xié)調(diào)軟硬件開發(fā)過程并行開展，一方面可以縮短設(shè)計(jì)周期，極大地提高設(shè)計(jì)效率。
5. A design support environment is a necessary in order to support parallel design and collaborative design . a codesign environment ? yh - cde is prsented in the thesis
   軟硬件協(xié)同設(shè)計(jì)強(qiáng)調(diào)設(shè)計(jì)進(jìn)程的并行化和協(xié)作化，該設(shè)計(jì)方法需要相應(yīng)輔助設(shè)計(jì)環(huán)境的支持。
6. It's difficult to find codesign in a sentence. 用codesign造句挺難的
7. The achievements of this paper have great theoretic and realistic significance to hardware / software codesign methodology and promote the application of codesign techniques
   本文的研究成果對于推動(dòng)軟硬件協(xié)同設(shè)計(jì)技術(shù)的發(fā)展和應(yīng)用有重要的理論意義和實(shí)踐意義。
8. The hardware / software co - synthesis determines the hardware and software a ] location and function mapping . hardware / software co - synthesis is a key problem of hardware / software codesign
   軟硬件協(xié)同綜合決定系統(tǒng)功能在軟硬件實(shí)現(xiàn)結(jié)構(gòu)上的分配，是軟硬件協(xié)同設(shè)計(jì)的核心問題。
9. Currently , the hardware / software codesign of a 32bit mulitmedia dsp named md - 32 is under way in the institute of information & communication engineering of zhejiang university
   目前，浙江大學(xué)信息與通信工程研究所正在進(jìn)行32位多媒體數(shù)字信號處理器(命名為md - 32 )的軟硬件開發(fā)。
10. This paper describes the design and implementation of a biochip scanning and analyzing system based on the embedded microprocessor / dsp codesign . the dsp software design of the system is presented in detail
    本文設(shè)計(jì)并實(shí)現(xiàn)了基于dsp和嵌入式處理器協(xié)同工作的生物芯片掃描分析系統(tǒng)，并著重?cái)⑹隽苏麄€(gè)系統(tǒng)的架構(gòu)以及系統(tǒng)的dsp軟件設(shè)計(jì)。
11. The thesis addresses the following key techniques in hardware / software codesign " system level behavior model , design evaluation , hardware / software co - synthesis and prototyping of embedded microprocessor
    本文的主要研究了系統(tǒng)軟硬件協(xié)同設(shè)計(jì)中的若干關(guān)鍵技術(shù)，包括：系統(tǒng)模型、設(shè)計(jì)評價(jià)技術(shù)、軟硬件協(xié)同綜合和嵌入式微處理器虛擬原型技術(shù)。
12. Based on the comparison of existing performance evaluation methods and analysis of the characteristic of scheduling problem in hardware / software codesign , the thesis presents a m system performance evaluation method based on " dynamic critical path first " heterogeneous multiprocessor schedule algorithm . experiments show the schedule algorithm is better than some other scheduling algorithms
    在對現(xiàn)有性能評價(jià)方法的深入對比研究和對軟硬件協(xié)同設(shè)計(jì)中調(diào)度問題分析的基礎(chǔ)上，本文提出了基于動(dòng)態(tài)關(guān)鍵路徑優(yōu)先調(diào)度進(jìn)行系統(tǒng)層性能評價(jià)的方法，實(shí)驗(yàn)表明該方法優(yōu)于其它幾種調(diào)度算法。