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system architecture design中文是什么意思

  • 系統(tǒng)架構(gòu)設(shè)計(jì)師
  • 系統(tǒng)結(jié)構(gòu)設(shè)計(jì)
  • 系統(tǒng)體系結(jié)構(gòu)設(shè)計(jì)

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  • 例句與用法
  • Be responsible for the system architecture design and major function implimentation
    負(fù)責(zé)系統(tǒng)架構(gòu)設(shè)計(jì)和主要功能開發(fā)。
  • System architecture design is crucial to a system ' s performance
    系統(tǒng)的總體結(jié)構(gòu)設(shè)計(jì)是決定一個(gè)系統(tǒng)性能好壞的關(guān)鍵因素。
  • According to system requirement , we design hardware and software system as a whole , and also discuss all modular functions of hardware system and software system architecture design at details
    針對(duì)實(shí)際系統(tǒng)要求，進(jìn)行了硬件和軟件總體設(shè)計(jì)，并且討論了系統(tǒng)硬件的各個(gè)功能模塊和軟件結(jié)構(gòu)化分層設(shè)計(jì)。
  • Major part of this dissertation involves implementation issues : the system architecture design , detailed module design and programming , and system testing , which has shown the implementation is operable and to some extent conforms to the standard
    論文最后討論了對(duì)作者開發(fā)的模擬試驗(yàn)系統(tǒng)的測(cè)試工作，包括單元測(cè)試和集成測(cè)試的要求和測(cè)試步驟，較詳細(xì)地列舉了對(duì)部分模塊進(jìn)行的測(cè)試。
  • Beside the system architecture design , this dissertation describes the synthesis and implementation of t2181 digital signal processor . it focuses on improving the system performance by adding appropriate constraints to the design
    本論文在完成系統(tǒng)結(jié)構(gòu)設(shè)計(jì)的同時(shí)，對(duì)系統(tǒng)的綜合與實(shí)現(xiàn)工作進(jìn)行了介紹，重點(diǎn)討論了如何利用合理的電路約束來優(yōu)化系統(tǒng)的性能，并通過實(shí)驗(yàn)數(shù)據(jù)來說明優(yōu)化效果。
  • Secondly , the paper describes the architecture design of the network management system in detail , including analyzing the architecture and technologies of the managed network , the base of the system architecture design , and so on . and it gives the network management system architecture on the basis of comparing some network management platforms and technologies
    然后對(duì)網(wǎng)絡(luò)管理系統(tǒng)的構(gòu)建進(jìn)行了詳細(xì)闡述，包括分析被管網(wǎng)絡(luò)的結(jié)構(gòu)和技術(shù)特點(diǎn)，論述網(wǎng)絡(luò)管理系統(tǒng)的結(jié)構(gòu)設(shè)計(jì)基礎(chǔ)，結(jié)合相關(guān)的網(wǎng)絡(luò)管理平臺(tái)和技術(shù)分析，設(shè)計(jì)構(gòu)建了適合被管網(wǎng)絡(luò)的網(wǎng)絡(luò)管理系統(tǒng)。
  • In this project , the author take part in the research of algorithm , system architecture design , and system hardware design . at the same time , the author mainly charge the research of simpling the preamble detecting algorithm for implementing and then implement the simpled preamble detecting algorithm on the fpga . finally , the system ’ s main functions were simulated and tested by author
    在本項(xiàng)目中,本人參與模式s應(yīng)答接收機(jī)處理算法研究、系統(tǒng)架構(gòu)設(shè)計(jì)以及系統(tǒng)硬件設(shè)計(jì)實(shí)現(xiàn)。在分工上,本人重點(diǎn)負(fù)責(zé)報(bào)頭檢測(cè)算法在實(shí)現(xiàn)時(shí)的簡化研究,以及fpga內(nèi)部處理模塊的具體實(shí)現(xiàn)。并對(duì)本處理系統(tǒng)的各項(xiàng)功能做了詳盡的測(cè)試和仿真。
  • In allusion to feature of the domain - specific radar net of early warning detection , the paper introduces a design method of software architecture in radar net including framework , design mode , components & duplication , and assessment of software architecture after studying the relevant achievements of c ^ 4isr architecture in the u . s . . it describes the software architecture from operation view , system view and technology view to meet the requirement of system architecture design
    從作戰(zhàn)視圖、系統(tǒng)視圖和技術(shù)視圖三個(gè)方面描述雷達(dá)組網(wǎng)軟件體系結(jié)構(gòu)，包括軟件體系結(jié)構(gòu)框架、設(shè)計(jì)模式、軟件構(gòu)件與重用和模型評(píng)估等方面的內(nèi)容，滿足系統(tǒng)體系結(jié)構(gòu)設(shè)計(jì)的需要。
  • In view of the step of the development of a system , we divide this paper into 4 units : system analyzing , system architecture designing , system thorough designing , system implementing , we give a detail analysis of each units , such as the designing of the hardware , adaptive filtering and the lms arithmetic in the processing of the datao this paper also supplies the step of the lms arithmetic and some source of the programme . in this paper , we discuss the communication between the computer and the apparatus , and analyze the synchronization technology in this system , also give the method of realizing them
    本文按照系統(tǒng)開發(fā)過程組織文章，包括系統(tǒng)分析、系統(tǒng)結(jié)構(gòu)設(shè)計(jì)、系統(tǒng)詳細(xì)設(shè)計(jì)和系統(tǒng)實(shí)施幾部分，對(duì)系統(tǒng)開發(fā)中的每一部分進(jìn)行了說明，并且重點(diǎn)對(duì)mi自動(dòng)測(cè)試系統(tǒng)中的關(guān)鍵部件進(jìn)行詳細(xì)的分析。包括對(duì)測(cè)試探頭部分的硬件設(shè)計(jì)；對(duì)自適應(yīng)濾波和lms算法進(jìn)行的詳細(xì)推導(dǎo)，給出了算法步驟和部分源程序；對(duì)計(jì)算機(jī)與儀器之間的通信進(jìn)行了分析并給出了實(shí)現(xiàn)方案；對(duì)系統(tǒng)中的同步技術(shù)分析了其機(jī)制和實(shí)現(xiàn)方法。
  • The vlsi ( very large scale integration ) design and implementation methodology of the high speed and high performance fast fourier transform ( fft ) processor is presented in this dissertation , which includes the system architecture design , a1gorithm implementation , the whole design flow from fpag to asic , verification method . we bui1d up our test p1atform for high speed application specified dsp processor . the fast fourier transform is one of the most widely used digital signa1 processing a1gorithms , the advances in vlsi technology have enabled the performance and integration of fft processors to increase steadily
    本文主要提出了研究高速高性能fft處理器的集成電路整套設(shè)計(jì)和實(shí)現(xiàn)方法，包括從系統(tǒng)架構(gòu)設(shè)計(jì)、算法實(shí)現(xiàn)、 fpga到asic的整套設(shè)計(jì)流程、驗(yàn)證及測(cè)試平臺(tái)的建立等，研制了具有自主知識(shí)產(chǎn)權(quán)的高速高性能的快速傅立葉變換處理器，該fft處理系統(tǒng)可以應(yīng)用于電信實(shí)時(shí)處理、高速數(shù)字信號(hào)處理和軍事應(yīng)用等。
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