code circuit造句
造句與例句
手機版
- The whole correlation - inheritance coding circuit system is designed , simulated and verified in verilog hdl on the candence systems
采用了硬件描述語言verilog對整個相關(guān)繼承矢量量化圖像編碼電路系統(tǒng)在cadence系統(tǒng)上進行了西安理工大學(xué)碩士論文設(shè)計、仿真及時序驗證。 - The circuit design mainly includes interface designs , such as address coding circuit , memory , human - machine , ad converter , the power , etc . the pcb was protracted and tested
電路設(shè)計主要包括譯碼電路設(shè)計、存儲器接口電路設(shè)計、人機接口電路設(shè)計、 ad轉(zhuǎn)換器電路設(shè)計、數(shù)控恒流源接口設(shè)計等。 - Finally , considering the advantages and disadvantages of these algorithms , a trade - off algorithm is proposed . a corresponding vlsi coding circuit system is designed and verified with fpga
最后結(jié)合各個算法的優(yōu)點，綜合考慮各方面性能，給出一個折衷的快速搜索算法，并且設(shè)計出與算法對應(yīng)的編碼電路系統(tǒng)。 - Based on a comprehensive research of image coding algorithm for correlation vq , novel algorithms are presented on two aspects in this paper , and corresponding vlsi coding circuit system is designed , simulated and verified
本論文在對相關(guān)矢量量化圖像編碼算法進行深入分析的基礎(chǔ)上，在兩個方面提出了基于vlsi技術(shù)的新算法，并進行了vlsi硬件設(shè)計、模擬仿真和時序驗證。 - The inversionless bm algorithm in rs decoder is implemented with serial mode , which avoids the inversion computation and only needs 3 finite - field multipliers . thus , the complexity of hardware implementation has been mostly reduced . a 3 - level pipe - line processing architecture is also used in the hardware and the coding circuit in rs coder is optimized by using the characteristics of the finite - field constant multiplier
Rs解碼器的設(shè)計采用無逆bm算法,并利用串行方式來實現(xiàn)，不僅避免了求逆運算，而且只需用3個有限域乘法器就可以實現(xiàn)，大大的降低了硬件實現(xiàn)的復(fù)雜度，并且因為在硬件實現(xiàn)上，采用了3級流水線（ pipe - line ）的處理結(jié)構(gòu)。 - It's difficult to see code circuit in a sentence. 用code circuit造句挺難的
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