It shows that the design is correct . writing a software for real - time collecting . displaying . saving , this software can set sampling frequency and time , the maximal frequency is looohz 編制了實(shí)時(shí)采集、顯示、存儲(chǔ)軟件,該軟件能設(shè)定采樣頻率和采樣時(shí)間,最高頻率可達(dá)1000hz 。
The signal generator is based on dds ( direct digital synthesize ) , the maximal frequency of signal is 5mhz , the minimal frequency is 100hz , its minimal resolution is 4 . 77hz ; in the module of data acquisition , we adopt a adc which the range of sample frequency is 100khz to 40mhz , and its resolution is 12 bits ; the most digital logic is accomplished in cpld ( complex programmable logic device ) ; the control and calculating is realized in computer , and the external hardware is communicated with computer by epp of it ; the software is programmed on the developing plat of labwindows / cvi 信號(hào)源采用直接數(shù)字合成原理實(shí)現(xiàn),它所能產(chǎn)生的信號(hào)頻率為100hz 5mhz ,最小頻率分辨率為4 . 77hz ;數(shù)據(jù)采集采用了12位的adc ,最高的采樣頻率為40mhz ,最低的采樣頻率為: 100khz ;主要的數(shù)字邏輯部分采用cpld實(shí)現(xiàn);控制以及計(jì)算功能在計(jì)算機(jī)內(nèi)完成,硬件電路板通過(guò)計(jì)算機(jī)的epp口實(shí)現(xiàn)與計(jì)算機(jī)的數(shù)據(jù)傳遞;軟件是在labwindows / cvi環(huán)境中編寫的。