On the basis of analyzing deeply the fundamental principle of internet protocol , this paper adopts the design procedure of field programmable gate array ( fpga ) to design the ip protocol processor 在深入分析ip ( internetprotocol )協(xié)議基本原理的基礎(chǔ)上采用現(xiàn)場可編程門陣列( fpga )的設(shè)計流程,對ip協(xié)議處理器進行了設(shè)計。
To realize the real - time tracking image target , we use the cpld ( c ' omplex programmable logic device ) to control the system logic and use ipga ( field programmable gate array ) to preprocessing the image 為了滿足系統(tǒng)的實時性要求,運用大規(guī)??删幊踢壿嬯嚵衏pld進行邏輯控制和現(xiàn)場可編程門陣列fpga對采集的視頻圖像做預(yù)處理。
The more high - powered dso can be manufactured with electronic components coming forth and its cost falling . the project applied the field programmable gates array ( fpga ) to realize random equivalent sampling 選用隨機等效采樣具有很高的技術(shù)優(yōu)勢,隨著器件成本的降低和高性能器件的出現(xiàn),完全可以做出更高性能的同類產(chǎn)品
The data compression algorithm must be fit to hardware implementation for the new pipeline magnetic flux detecting system will adopt fpga ( field programmable gates array ) as the system kernel 由于新型管道漏磁檢測器將以現(xiàn)場可編程門陣列器件( fpga : fieldprogrammablegatesarray )作為系統(tǒng)核心,數(shù)據(jù)壓縮算法必須適合于硬件實現(xiàn)。
With develop of the electronic design automatic , the integration of field programmable gate array is greatly improved , and it is widely used . so fpga is the first choice to implement the blind equalizer 隨著電子設(shè)計自動化的發(fā)展,現(xiàn)場可編程門陣列的集成度大大提高,應(yīng)用領(lǐng)域也更加廣闊,因此, fpga成為實現(xiàn)盲均衡器硬件系統(tǒng)的首選。
The fast development of vlsi technology has provided the base of hardware for fpga ( field programmable gate array ) is most suitable for performing real - time pixel - level image processing operations Vlsi技術(shù)的迅猛發(fā)展為數(shù)字圖像實時處理技術(shù)提供了硬件基礎(chǔ)。其中fpga (現(xiàn)場可編程門陣列)的特點使其非常適用于進行一些基于像素級的圖像處理。
The methodology of interfacing with eprom / eeprom is discussed . an interfacing model with parameter timing is proposed . the contents of the dissertation has been verified by fpga ( field programmable gate arrays ) 本文研究的從pciip軟核、從pci內(nèi)側(cè)協(xié)議與pvci標(biāo)準(zhǔn)外設(shè)總線的接口綜合技術(shù)通過了fpga ( fieldprogrammablegatearrays )功能驗證。
Among all of these , because it ' s flexible design method and high speed , " field programmable gate array " ( fpga ) has been widely used in many digital design of application specific integrated circuit 其中, “現(xiàn)場可編程門陣列” (即fpga , fieldprogrammablegatearray )由于其設(shè)計靈活、速度快,在數(shù)字專用集成電路的設(shè)計中得到更為廣泛的應(yīng)用。
And then , aiming at the deficiency of conventional design , the high - compositive fpga ( filed programmable gate array ) chip is used as the core in this project to deal with the signal of six encoders in real time 其次針對以往設(shè)計的不足,采用了以高度集成的fpga (現(xiàn)場可編程邏輯陣列)芯片為核心的設(shè)計方式,實現(xiàn)六路光電編碼器信號的同步實時處理。
Known as rapidly reconfigurable field - programmable gate arrays , these chips consist of thousands of identical cells , each of which can perform numerous different logical functions , depending on how it is programmed 這些晶片稱為快速可重組的實地規(guī)劃閘陣列,由數(shù)千個一模一樣的小單元所構(gòu)成,每個單元都能依照各自規(guī)劃的方式,執(zhí)行多種不同的邏輯功能。