It also discusses the code and decode theory for rs error - correcting codes , then summarizing the design and debug experience for the rs ( 31 , 15 ) coder and decoder through fpga 文章中還討論了rs糾錯(cuò)碼的編譯碼原理和算法,總結(jié)了基于fpga實(shí)現(xiàn)一個(gè)rs ( 31 , 15 )編碼和譯碼器的設(shè)計(jì)經(jīng)驗(yàn)和調(diào)試經(jīng)驗(yàn)。
Turbo codes represent the new code structures , which consist of pccc ( parallel serially convolutional code ) and sccc ( serially concatenated convolutional code ) . in this paper , the background of turbo codes are firstly introduced , which includes the base principle of error correction code 、 block code and convolutional code ; the principle of turbo code and the iterative decoding is secondly expanded ; the key decoding algorithm : a revised map algorithm and iterative decoding theory are detailed ; then , a new turbo code structure : hccc ( hybrid concatenated convolutional code ) is presented , and the capacity of this code method is analyzed , the average capacity upper bound is derived ; at last , this code is simulated on awgn ( additive white gaussian noise ) channel and rayleigh fading channel 本文首先介紹了turbo碼的背景知識(shí),包括差錯(cuò)控制的基本原理、分組碼和卷積碼;然后闡述了turbo碼的基本原理,包括turbo編譯碼器結(jié)構(gòu)及迭代譯碼原理;較為詳細(xì)地描述了關(guān)鍵的譯碼算法: ?種改進(jìn)的最大后驗(yàn)概率( map )譯碼算法及迭代譯碼算法;提出了一種新的turbo碼結(jié)構(gòu):混合turbo碼(混合級(jí)聯(lián)卷積碼) ;并用編碼性能聯(lián)合界分析方法對(duì)混合turbo碼進(jìn)行了性能分析,得出了其平均性能上界;并在高斯白噪聲信道和瑞利衰落信道上分別作了一些應(yīng)用研究及計(jì)算機(jī)仿真實(shí)驗(yàn)。
Firstly , this thesis reviews the evolution of image coding / decoding theory , summarizes the technology framework of several image / video coding / decoding standards , designs a contrasting research to these standards , interoperates the origin of the h . 264 ' s advantages , and investigates the principal structure and the key modules of h . 264 , as establishing necessary theory basis for the practical application 首先,本文回顧了圖像編解碼理論的發(fā)展歷程,總結(jié)了多種靜態(tài)圖像和視頻的編解碼標(biāo)準(zhǔn)的技術(shù)框架,對(duì)各種標(biāo)準(zhǔn)進(jìn)行了比較研究,然后分析了h . 264的優(yōu)勢(shì)來源,接著研究了h . 264的主體結(jié)構(gòu)和關(guān)鍵模塊,為實(shí)際應(yīng)用奠定了必要的理論基礎(chǔ)。
The task is based on st ’ s sdtv channel decoder solution with a highly integrated single - chip fully digital qam demodulation stv0297 . chapter 1 introduced the interrelated background of this item ; chapter 2 introduced the coding and decoding theory about channel ; chapter 3 described the hardware structure , the function , the realizing principle and the method of the pcb design ; the scheme and flow chart of software design are also described in detail in chapter 4 ; chapter 5 described the testing and analyzed the result ; at last , chapter 6 presented the summing - up of this dissertation 第一章介紹了本項(xiàng)目的相關(guān)背景知識(shí);第二章簡(jiǎn)單描述了信道編解碼原理;第三章系統(tǒng)地介紹了標(biāo)準(zhǔn)清晰度數(shù)字電視機(jī)頂盒信道解碼器的硬件構(gòu)成、功能和實(shí)現(xiàn)原理,并介紹了電路板的設(shè)計(jì)方法;第四章對(duì)信道解碼的軟件設(shè)計(jì)方案和實(shí)現(xiàn)流程也做了比較詳細(xì)的闡述;第五章給出了測(cè)試結(jié)果并對(duì)其進(jìn)行了分析;第六章對(duì)本論文進(jìn)行了總結(jié)。
The forth chapter focus on the researches of decoding algorithm , first studies the decoding theory and decoding approaches of several iterative message passing algorithms for ldpc code , because of the conflict between simplification and reduced performance of bp decoding algorithm , the thesis analyzes the calculation complexity of each algorithm , and simulates the performance of each algorithm , by considering the tradeoff between hardware complexity and error performance , we get two algorithms which are much easier to implement : bp - based and normalized bp - based decoding algorithm , especially , the last one achieves considerable improvement with almost the same complexity 第四章對(duì)ldpc碼譯碼算法進(jìn)行了深入研究,給出了基于置信傳播的幾種譯碼算法的原理和步驟,圍繞著bp算法的簡(jiǎn)化與譯碼性能下降的矛盾,研究了每一種譯碼算法的復(fù)雜度分析,并相應(yīng)地給出了每一種譯碼算法的仿真性能曲線,綜合考慮譯碼性能和譯碼復(fù)雜度兩個(gè)方面,從而得出了適合硬件實(shí)現(xiàn)的算法: bp - based和normalizedbp - based算法,后者在基本不增加譯碼復(fù)雜度的情況下,對(duì)譯碼性能有較大的提高。